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Design integrity with non-repeated design loops between electrical
and physical design in just hours.
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Verification of the same data structure in 2D and 3D states.
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Streamlined data transfer to package assembly houses.
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Standard input and output file formats.
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Planned functionality for future package technologies.
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A user-friendly environment for the infrequent user.
Overview
Package Synthesizer™ is a true 3D IC package design tool suite.
It has been engineered for the frequent and infrequent user.
Package
Synthesizer provides an intuitive and integrated environment for complete
designs of single chip, multi-chip, and exotic packages for BGA, CSP,
Flip Chip, as well as high density, advanced technology substrates.
Push the
limits of physical and electrical design and deliver your products
to market faster by significantly reducing design cycle times. Increase
product reliability, performance and manufacturability using: integrated
optimization tools that use a correct-by-design methodology; free-angle
auto-routing including package-specific algorithms; design technology
rule kits for build-up via structures; 3D design rule constraints
that adhere to manufacturing processes; parametric bond shell generator;
real-time analysis and integration to 3rd party parasitic extraction
and simulation tools.
Package
Synthesizer is your one stop solution from product conception to manufacturing.
Starting
A Design
Starting a design session is simple. With Package Synthesizer, you
have the tools and flexibility to start a design with or without
data. If you have information about the die and connection list
in a text document, you can easily read this information into Package
Synthesizer using the ASCII Wizard. Your die and/or net-list information
is then used to create an intelligent package layout ready for analysis,
documentation and finally manufacturing. Package Synthesizer also
accepts other industry-standard input formats including DXF, GDSII,
DIE and AIF.
3D
Bond Wire Checking/Viewing
Visual
verification of the complete bond wire pattern can be seen in a
3-dimensional state. The 3D Bond Viewer uses bond wire profile sweeps,
along with die and bond finger thickness to simulate the view. Zoom
in and out, pan and rotate the view to examine areas of interest.
The 3D Bond Viewer is linked directly with the design environment
of Package Synthesizer giving real-time updates when changes are
made to the bond wire pattern.
For complex vias, a 3D substrate viewer shows you areas of concern
in a realistic environment.
Design
Rule Verification
A rich set of mechanical and electrical design rule checks are available.
For example, a 3-dimensional design rule is available to check wire-to-wire
conflict in a 3D state. This ensures that crossing bond wires do
not conflict with one another, even if they appear to do so in 2
dimensions.
Over 40
packaging-specific rules are available to ensure IC package manufacturability,
excluding those for conventional substrate design verification. Package
Synthesizer offers a robust set of DRCs for IC packaging.
Interactive & Critical Routing
Manually routing an IC package is difficult unless your tool vendor
has supplied the process flow and routing capabilities needed to make
the chore as easy as possible. Zuken has taken steps in creating a
process- and feature-rich environment to achieve a quicker and more
accurate route for packaging. Our interactive router is completely
intelligent for package substrate layout, providing 45 and any angle
options, push, shove and spring back capabilities. The interactive
router is constraint driven allowing intelligence for critical net
cases of pin pair, pin groups, match lengths, impedance and cross-talk
algorithms to solve the most complex routing problems.
Package Substrate
Auto-routing
One of the main problems in designing an IC package is conductor
escape. Zuken has made great strides in developing a solution for
this type of routing problem. Our unique package substrate auto-router
tackles this by treating the problem as a whole. This means that
a routing escape solution is found before the first trace is set
down. Once a solution is found, the router then completes the route.
The package router works with 90, 45 and any angle routes and is
constraint driven.
Package Routing
Feasibility Analysis
Another major problem in designing an IC package is that designers
are forced to guess if a design concept is feasible unless it has
been meticulously routed by hand. Zuken has again made great strides
in developing an automated solution for this type problem. Our newest
package feasibility analyzer takes the painstaking guesswork out
of the design process by reporting to you if a package concept can
be realized or not, in just a few minutes.
The feasibility analyzer reports the number of layers needed to
achieve a package route, number of pins on each layer and a completion
percentage. In addition, itautomatically develops via patterns
to be used on the substrate during the route.
Electrical Analysis/Simulation
Pre-analysis based on physical and electrical conditions is critical
in complex IC package designs. Zuken provides intuitive processes
and functionality, such as net topology, custom simulation, reflection
simulation and stimulus definition to prove connection and layout
criteria.
Simple to understand GUIs and intuitive reporting functions give
users a better advantage in understanding how high-speed substrate
entities electrically coexist.
3rd
Party Interfaces
Zuken’s Package Synthesizer is now tightly linked with standard
RF high frequency circuit/PCB design by Agilent’s
ADS system. ADS’ unparalleled simulation technology coupled
with Package Sythesizer’s outstanding placement/routing functions
strongly supports one board and one module design methodologies
of Base Band/RF circuits. ADS’ tight integration provides: RF/Irregularity/Analog/Digital
circuits including digital irregularity and error correction technologies.
Optimize simulation engines for each circuit. 90,000 plus parts
library including passive parts, transistors, etc. Link with actual
measurement equipments to allow real base test module verification.
Package Synthesizer interfaces with Ansoft’s
Maxwell, HFSS and Turbo Package
Analyzer solutions for true RLCG reporting and 3D SPICE
simulation. Zuken to Ansoft interfacing provides: True 3D via structures
for advanced build-up technologies and embedded components Stacked
chip capability and die-to-die bonding True positive power plane
representation versus the negative image approach S-Parameter data
Interpolating sweep solving Critical net simulation ANF, NF1 & NF2
output.
HDI
Build-up Automation
Package Synthesizer offers the most advanced solutions available for
High Density Interconnect technologies. Predefined build-up rule kits
provided by major build-up manufacturers ensure accurate, manufacturable
designs upfront. Rule kits guide the designer through the intricacies
of each technology, to creating manufacturable designs without in-depth
knowledge of these specific technologies. Powerful, easy to use functionality
reduces the learning curve and time-to-results. Zuken’s HDI build-up
capabilities include: Design Rule Editor Via Division/ Via Merge (2D&3D)
Real Time 3D Viewer/Editor Unnecessary antenna via removal Mesh Plane
Auto Generation Copper Distribution Via From-To Monitor Download Rules
through the WEB.
Documentation/Manufacturing Output
Package
Synthesizer outputs various types of ASCII lists pertaining to your
design including bond wire details, net connections, trace lengths
and DRC reports.
Additionally, you can create custom reports by selecting specific
topics to be included in a requested output.
Package
Synthesizer also offers time-saving documentation automation specifically
designed to expedite documentation tasks for IC package design.
Feature-rich programs quickly generate bond shell and other important
documentation diagrams useful in communications with assembly houses
on details of wire bond locations and package substrate information.
The Diagram Generator offers documentation for BGA, chip, rats-nest,
package label and outline. Package Synthesizer supports standard
output formats including DXF, Gerber and GDSII.
Summary
A rules-driven correct-by-design methodology, integrated tools featuring
free-angle auto routing with packaging-specific algorithms, a rules-based
design environment and built-in analysis with automated advisors.
An intuitive, customizable user-interface improves ease-of-use and
total throughput from design to manufacturing.
Its common database enables dynamic linking of data for analysis,
interconnect and design trade-offs, ensuring:
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Design integrity with non-repeated design loops between electrical
and physical design in just hours
-
Verification of the same data structure in 2D and 3D states
-
Streamlined data transfer to package assembly houses
-
Standard input and output file formats
-
Planned functionality for future package technologies
-
A user-friendly environment for the infrequent user
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